Difference between revisions of "3101"

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(Added more info and a reference to the scanned manual.)
 
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{{Stub}}
 
{{Stub}}
 
==Introduction==
 
==Introduction==
What does it do?
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PIOC stands for '''Programmable Input Output Controller'''. It is an ND-100 interface card capable of handling four full duplex serial communication lines at up to 800 kbits/s in theory. In practice four duplexlines at 38kbaud is about the limit for the card. The hardware is built around an MC 68000 microprocessor and 128 Kbytes of Random Access Memory (RAM) with error correction logic.
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The local memory is mapped into the ND-100 memory map using the thumb wheels at the same way as any memory card. Each step is 128 kbyte and the location of the memory can be read by an [[IOX]] instruction. Reset and halt of the 68000 CPU is controlled from the ND-100 side. The local 8 kbyte EPROM contains reset and interrupt vectors for the local CPU.
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In the other direction the PIOC can raise interrupt level 12
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There are several high level protocols handled by the PIOC. For even higher versatility, the PIOC can be programmed in [[PLANC]].
  
 
==Switches and indicators==
 
==Switches and indicators==
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* LED 1 (red) - MC 68000 reset
 
* LED 1 (red) - MC 68000 reset
 
* LED 2 (red) - MC 68000 halt
 
* LED 2 (red) - MC 68000 halt
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{| class="wikitable"
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! PIOC number
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! Device number <br> (Octal)
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! Ident codes <br> (Octal)
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|-
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| 0
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| 140020
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| 140002
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|-
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| 1
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| 140024
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| 140003
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|-
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| 2
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| 140030
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| 140004
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|-
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| 3
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| 140034
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| 140005
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|-
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| 4
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| 140040
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| 140006
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|-
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| 5
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| 140044
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| 140007
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|}
  
 
==Connectors==
 
==Connectors==
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==I/O Devices on the card==
 
==I/O Devices on the card==
none?
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The PIOC is represented to the ND-100 side as one I/O device with two registers.
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* PIOC Control word, IOX PIOC+3 (write)
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BIT O = 1 - ENABLE FOR SCIP INTERRUPT
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BIT 2 = 1 — SET ND CALLING INTERRUPT
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BIT 3 = 1 - START OPCOM
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BIT 4 = 1 - RESET
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BIT 5 = 1 - HALT
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BIT 6 = 1 - POWER LOW
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BIT 7 = 1 — SET ND READY INTERRUPT
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BIT 8 = 1 - DISABLE CHECK BIT WRITE
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* PIOC Status Word, IOX PIOC+2 (read)
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BIT O = 1 - STATUS CHANGE IN PIOC INTERRUPT ENABLED
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BIT 2 = 1 - STATUS CHANGE IN PIOC (SCIP)
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BIT 4 = 1 - PIOC RESET ON
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BIT 5 = 1 - PIOC HALTED
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BIT 8—15 READS BACK BANK NUMBER OF THE COMMON MEMORY
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==See also==
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* [[3108]] Expanded PIOC
  
 
==References==
 
==References==
 +
*{{ND-doc|02.003.1}}
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** [http://www.home.neab.net/ND-library/02-PIOC%20hardware/ND-02.003.01%20PIOC%20Hardware%20Reference%20Manual-Gandalf-OCR.pdf Online pdf of the manual]
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** [http://www.home.neab.net/ND-library/02-PIOC%20hardware/ND-02.003.01%20PIOC%20drawings-Gandalf-OCR.pdf Gray scale scans of the drawings]
 
*{{ND-doc|30.008.3 EN}}, page 233
 
*{{ND-doc|30.008.3 EN}}, page 233
  
 
[[Category:ND-100 hardware]]
 
[[Category:ND-100 hardware]]

Latest revision as of 21:48, 29 April 2019

3101 is the PIOC interface.

Introduction

PIOC stands for Programmable Input Output Controller. It is an ND-100 interface card capable of handling four full duplex serial communication lines at up to 800 kbits/s in theory. In practice four duplexlines at 38kbaud is about the limit for the card. The hardware is built around an MC 68000 microprocessor and 128 Kbytes of Random Access Memory (RAM) with error correction logic.

The local memory is mapped into the ND-100 memory map using the thumb wheels at the same way as any memory card. Each step is 128 kbyte and the location of the memory can be read by an IOX instruction. Reset and halt of the 68000 CPU is controlled from the ND-100 side. The local 8 kbyte EPROM contains reset and interrupt vectors for the local CPU. In the other direction the PIOC can raise interrupt level 12

There are several high level protocols handled by the PIOC. For even higher versatility, the PIOC can be programmed in PLANC.

Switches and indicators

  • thumbwheel 1 - PIOC number switch
  • thumbwheel 2 - bank-number switch (least significant)
  • thumbwheel 3 - bank-number switch (most significant)
  • LED 3 (yellow) - active memory cycle
  • LED 1 (red) - MC 68000 reset
  • LED 2 (red) - MC 68000 halt
PIOC number Device number
(Octal)
Ident codes
(Octal)
0 140020 140002
1 140024 140003
2 140030 140004
3 140034 140005
4 140040 140006
5 140044 140007

Connectors

The A and B connectors are used for I/O, the C connector is used for the ND-100 Bus.

I/O Devices on the card

The PIOC is represented to the ND-100 side as one I/O device with two registers.

  • PIOC Control word, IOX PIOC+3 (write)
BIT O = 1 - ENABLE FOR SCIP INTERRUPT
BIT 2 = 1 — SET ND CALLING INTERRUPT
BIT 3 = 1 - START OPCOM
BIT 4 = 1 - RESET
BIT 5 = 1 - HALT
BIT 6 = 1 - POWER LOW
BIT 7 = 1 — SET ND READY INTERRUPT
BIT 8 = 1 - DISABLE CHECK BIT WRITE
  • PIOC Status Word, IOX PIOC+2 (read)
BIT O = 1 - STATUS CHANGE IN PIOC INTERRUPT ENABLED
BIT 2 = 1 - STATUS CHANGE IN PIOC (SCIP)
BIT 4 = 1 - PIOC RESET ON
BIT 5 = 1 - PIOC HALTED
BIT 8—15 READS BACK BANK NUMBER OF THE COMMON MEMORY

See also

References