ND-1xx Instructions: Difference between revisions

From NDWiki
Jump to navigation Jump to search
(→‎Instruction Set: Added some descriptions from ND-99.005)
(More descriptions)
Line 43: Line 43:


=== Bit Instructions ===
=== Bit Instructions ===
* [[BSKP]] –  
* [[BSKP]] – Skip next location if specified condition is true
* [[BSET]] –  
* [[BSET]] – Set specified bit equal to specified condition
* [[BSTA]] –  
* [[BSTA]] – Store and clear K
* [[BSTC]] –  
* [[BSTC]] – Store complement and set K
* [[BLDA]] –  
* [[BLDA]] – load K
* [[BLDC]] –  
* [[BLDC]] – Load bit complement to K
* [[BANC]] –  
* [[BANC]] – Logical AND with bit complement
* [[BORC]] –  
* [[BORC]] – Logical OR with bit complement
* [[BAND]] –  
* [[BAND]] – Logical AND to K
* [[BORA]] –  
* [[BORA]] – Logical OR to K


=== Shift Instructions ===
=== Shift Instructions ===
* [[SHT]] –  
* [[SHT]] – Shift T register
* [[SHD]] –  
* [[SHD]] – Shift D register
* [[SHA]] –  
* [[SHA]] – Shift A register
* [[SAD]] –  
* [[SAD]] – Shift A and D registers connected
* [[ROT]] –  
* [[ROT]] –  
* [[ZIN]] –  
* [[ZIN]] –  
Line 141: Line 141:
== Sources ==
== Sources ==
*{{ND-doc|06.014|(ND-06.014.02 rev A)}}
*{{ND-doc|06.014|(ND-06.014.02 rev A)}}
*ND-100 Instant Instruction Codes (ND-06.021Q02 12/82)
*{{ND-doc|99.005|(ND-99.005.02 12/84)}}

Revision as of 16:20, 16 January 2009

Instruction Set

Memory Reference Instructions

Store Instructions

  • STZ – Store zero
  • STA – Store A
  • STT – Store T
  • STX – Store X
  • MIN – Memory increase, skip if zero

Load Instructions

Arithmetic and Logical Instructions

Double Word Instructions

  • LDD – Load double word
  • STD – Store double word

Floating Instructions

  • LDF – Load floating accumulator
  • STF – Store floating accumulator
  • FAD – Add to floating accumulator (C may also be affected)
  • FSB – Subtract from floating accumulator (C may also be affected)
  • FMU – Multiply floating accumulator (C may also be affected)
  • FDV – Divide floating accumulator (Z and C may also be affected)

Byte Instructions

Execute Instruction

  • EXR – Execute instruction found in specified register

Bit Instructions

  • BSKP – Skip next location if specified condition is true
  • BSET – Set specified bit equal to specified condition
  • BSTA – Store and clear K
  • BSTC – Store complement and set K
  • BLDA – load K
  • BLDC – Load bit complement to K
  • BANC – Logical AND with bit complement
  • BORC – Logical OR with bit complement
  • BAND – Logical AND to K
  • BORA – Logical OR to K

Shift Instructions

  • SHT – Shift T register
  • SHD – Shift D register
  • SHA – Shift A register
  • SAD – Shift A and D registers connected
  • ROT
  • ZIN
  • LIN
  • SHR

System Control Instructions

Transfer Instructions

Load Independent Instructions

Inter-level Instructions

Register Operations

Arithmetic Operations, RAD=1:

C,O,Q may be affected by the following operations

Logical Operations, RAD=0:

Combined Instructions:

Extended Arithmetic Operations:

Floating Conversion

Memory Examine/Deposit Instructions

Sequencing Instructions

Unconditional Jump

Conditional Jump

Skip Instructions

Sources