3202 is the ND-120 CPU board.
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It contains the CPU, bus arbitration logic, memory control, memory and other subsystems. It also has the Real time clock and the I/O for the serial console.
Switches and indicators
- SW3 - Master Clear - normal position = central. This switch may be depressed to give a hardware master clear to the CPU.
- TH1 - ALD select
- TH2 - Baud rate select
- LED3 - self test passed (green)
- LED2 - self test fail (red)
- LED1 - cache OFF (red)
- SW1 - Cache ON, normal position = down.
- LED6 - CPU grant (green)
- LED7 - bus grant (yellow)
- SW2 - Memory OFF, normal position = down.
- LED4 - parity error (red)
- LED5 - parity disable (red)
- SW4 - Parity disable, normal position = down.
- upper limit display
- 000 - memory off (SW2)
- 100 - 2M Bytes onboard memory
- 200 - 4M Bytes onboard memory
- 300 - 6M Bytes onboard memory
The A and B connectors are used for I/O, the C connector is used for the ND-100 Bus.
I/O Devices on the card
ECO or Engineering Change Order is a hardware change. Here is a list of known ECO's for this card.
- ECO 100-779 - System failing with cache enabled
- ECO 100-785 - Memory out of range, IOX-error
- ECO X01 - New backup battery for the calendar on ND-120 CPU
- sintran.com, Norsk Data library, ECO 
- Norsk Data Document ND–30.008.3 EN ND-100 Hardware Maintenance , page 255