LDF - Revision history

TArntsen: Typo: lf->of

2010-06-30T14:29:30Z

Typo: lf->of

← Older revision		Revision as of 14:29, 30 June 2010
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	}}		}}

	'''LDF''' is an assembly instruction. The contents of the [[effective address]] and the two following locations ared loaded into the [[floating accumulator]], i.e. T, A and D registers. The instruction always load the three registers, even in CPUs with the [[32-bit floating point]] option. With 32-bit floating point units the application must use the [[LDD]] doubleword instruction instead lf LDF. [[MAC]] programmers may use the MAC mnemonic [[LDR]] instead, which will translate to LDF or LDD depending on target.		'''LDF''' is an assembly instruction. The contents of the [[effective address]] and the two following locations ared loaded into the [[floating accumulator]], i.e. T, A and D registers. The instruction always load the three registers, even in CPUs with the [[32-bit floating point]] option. With 32-bit floating point units the application must use the [[LDD]] doubleword instruction instead of LDF. [[MAC]] programmers may use the MAC mnemonic [[LDR]] instead, which will translate to LDF or LDD depending on target.

	LDF is also used as a generic 3-word load function, and applications may use LDF with [[STF]] to copy 3 words at the time with no floating point operation performed on the floating point accumulator. This usage is independent of which floating point option the CPU is equipped with.		LDF is also used as a generic 3-word load function, and applications may use LDF with [[STF]] to copy 3 words at the time with no floating point operation performed on the floating point accumulator. This usage is independent of which floating point option the CPU is equipped with.

TArntsen: Spellfix: Arcitecture -> Architecture

2009-08-03T13:33:36Z

Spellfix: Arcitecture -> Architecture

← Older revision		Revision as of 13:33, 3 August 2009
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	\|Code=034 000		\|Code=034 000
	\|Affected=T:=(ea) A=(ea+1) D=(ea+2)		\|Affected=T:=(ea) A=(ea+1) D=(ea+2)
	\|~~Arcitecture~~=[[ND-100]], [[ND-110 CPU\|ND-110]]		\|Architecture=[[ND-100]], [[ND-110 CPU\|ND-110]]
	}}		}}

TArntsen: LDF instruction

2009-07-31T14:35:38Z

LDF instruction

New page

{{InstructionBox
|Mnemonic=LDF
|Description=Load floating accumulator
|Format=LDF ''<[[ND-100 addressing modes|addr. mode]]> <[[displacement|disp.]]>''
|Code=034 000
|Affected=T:=(ea) A=(ea+1) D=(ea+2)
|Arcitecture=[[ND-100]], [[ND-110 CPU|ND-110]]
}}

'''LDF''' is an assembly instruction. The contents of the [[effective address]] and the two following locations ared loaded into the [[floating accumulator]], i.e. T, A and D registers. The instruction always load the three registers, even in CPUs with the [[32-bit floating point]] option. With 32-bit floating point units the application must use the [[LDD]] doubleword instruction instead lf LDF. [[MAC]] programmers may use the MAC mnemonic [[LDR]] instead, which will translate to LDF or LDD depending on target.

LDF is also used as a generic 3-word load function, and applications may use LDF with [[STF]] to copy 3 words at the time with no floating point operation performed on the floating point accumulator. This usage is independent of which floating point option the CPU is equipped with.

== References ==
*{{ND-doc|06.014.02|Page 3-20}}
*{{ND-doc|06.029.01|Page 60}}
*{{ND-doc|60.096.01|Appendix E}}

[[Category:ND-100 instructions]]