TArntsen: stored bits->stored in bits

2010-07-24T16:51:26Z

stored bits->stored in bits

← Older revision		Revision as of 16:51, 24 July 2010
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	Word address = (T) + (X)/2		Word address = (T) + (X)/2
	If X is even (bit 0 = 0), the byte is stored bits 8-15 of the word		If X is even (bit 0 = 0), the byte is stored in bits 8-15 of the word
	If X is odd (bit 0 = 1), the byte is stored bits 0-7 of the word		If X is odd (bit 0 = 1), the byte is stored in bits 0-7 of the word

	== References ==		== References ==

TArntsen: SBYT instruction

2010-07-24T16:13:22Z

SBYT instruction

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{{InstructionBox
|Mnemonic=SBYT
|Description=Store byte
|Format=SBYT
|Code=142 600
|Affected=(ea)
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]]
}}

'''SBYT''' is an assembly instruction. The byte in the [[A register]] bits 0-7 is stored in one half of the [[effective address]] defined by the [[T register|T]] and [[X register|X registers]]. The other half of the location is unaffected.

As the ND-1x0's RAM is addressed by 16-bit words two registers are needed to address bytes. The T register points to a word, and the X register indicates the byte offset, counting from the left byte of the word pointed to by T.

Word address = (T) + (X)/2
If X is even (bit 0 = 0), the byte is stored bits 8-15 of the word
If X is odd (bit 0 = 1), the byte is stored bits 0-7 of the word

== References ==
*{{ND-doc|06.014.02|Page 3-27}}
*{{ND-doc|06.029.01|Page 27, page 91}}

[[Category:ND-100 instructions]]

SBYT - Revision history

TArntsen: stored bits->stored in bits

TArntsen: SBYT instruction