View source for ND-100

The '''ND-100''' was a 16-bit minicomputer series made by [[Norsk Data]], introduced in [[1979]]. It shipped with the [[SINTRAN III]] operating system, and the architecture was based on, and backwards compatible with, the [[NORD-10]] line.

The NORD-100 was originally named the NORD-10/M (''M'' for ''Micro'') as a bitsliced OEM processor. The board was laid out and finished and tested when they realized that the CPU was far faster than the NORD-10/S. The result was that all the marketing material for the new NORD-10/M was discarded, the board was rechristened the NORD-100, and extensively advertised as the successor of the NORD-10 line. Later (the year was 1978), in an effort to internationalize their line, the machine was renamed ND-100.

==Performance==
{| style="width:100%;" border="1"
|+  Relative CPU performance
! !! ND-100 !! ND-100/CE !! ND-110 !! ND-110/CX !! ND-120/CX !! ND-125/CX 
|-
| Minimum number of microinstructions per instruction || 3 || 3 || 1 || 1 || ||  
|-
| Minimum microinstruction cycle time || 150ns || 150ns || 100ns || 100ns || ||
|}

==CPU==
The ND-100 line used a custom processor, and like the [[Wikipedia:PDP-11|PDP-11]] line, the CPU decided the name of the computer.

*NORD-100/CE, Commercial Extended, with decimal arithmetic instructions
*ND-100/CX, improved the CE instructions and added some new instructions
*ND-110, incrementally improved ND-100. Same performance and instruction set as the ND-100/CX.
*ND-110/CX, a faster version of the ND-110 (1.5-3.5 times faster).
*ND-120/CX, completely redesigned. 
*ND-125/CX, a 120 CPU board with faster access to onboard memory and increased onboard memory size.

The ND-100 line was machine-instruction compatible with the Nord-10 line, except for some "extended instructions", all in supervisor mode, mostly used by the operating system. Like most processors of its time, the native bit grouping was octal, despite the 16-bit word length.

The ND-100 series had a [[Microprogram|microcoded]] central processing unit, with [[microcode#Writable_control_stores | downloadable microcode]], and was considered a CISC processor.

The ND-100 was implemented using medium-scale integration (MSI) logic and bit-slice processors.

The ND-100 was frequently sold together with a memory management card, the MMS. The combined power use of these boards was 90 watts. These boards would usually occupy slots 2 and 3, for the CPU and MMS, respectively. Slot 1 was reserved for the Tracer, a hardware debugger system.

===ND-100/CE===
The CE stood for Commercial Extended. The processor was upgraded by replacing the microcode PROM.

It added instruction for decimal arithmetic and conversion ([[ND-1xx_Instructions#Decimal_Instructions|decimal instructions]]) and [[ND-1xx_Instructions#Stack_Handling_Instructions|stack handling instructions]].

===ND-100/CX===
The CX option improved the instructions introduced with the CE option, and added some [[ND-1xx_Instructions#Additional_instructions_in_the_CX_option|new instructions]]: [[MOVEW]], [[TSET]], [[RDUS]] and [[ND-1xx_Instructions#SINTRAN-III_Segment_Change_Instructions|segment change instructions]].

===ND-110===
{{Main|ND-110 CPU|ND-110 Satellite Series}}
The ND-110 was an incremental improvement over the ND-100.

The ND-110 combined the Memory Management System and CPU, previously separate cards, on one board. The single CPU/MMS board was plugged into the memory management board slot, usually numbered 3. The power consumption was reduced from 90 watts to 60. 

The ND-110 made extensive use of PALs and gate arrays - with "semi-custom" VLSI chips. 

The ND-110 had three gate arrays:

* The Micro Instruction Controller, the MIC - also known as RMIC, for "Rask MIC" ("Speedy MIC"). It replaced three 74S482 sequencers and about 30 other ICs.
* The Arithmetical and Logical Unit gate array (ALU, also known as the "BUFALU"). Replaced four Am2901 bit-slice processors, and some additional registers like the data bus register the general purpose register, and the internal register block.
* The Micro Address Controller (The MAC, also called RMAC, for "Rask MAC" ("Speedy MAC"). It implemented hardware address arithmetic, which in the ND-100 had been done in microcode.

In addition to the macro-instruction cache memory also found in the ND-100, the ND-110 had a unique implementation of cache memory on the micro-instruction level. The step known as mapping in the ND-100 was then avoided because the first micro-instruction word of a macro-instruction was written into the control store cache.

Unlike the ND-100 CPU, it handled synchronous interrupts as traps, similar to how it was handled by the ND-500.

The [[control store]] consisted of 4K x 4 bit 40ns SRAM chips. This meant that [[microcode#Writable_control_stores | the control store was writable]]. It was loaded at power up and Master Clear from two 32Kx8 bit EPROMs.

The CPU clock and the bus arbitration network were implemented using 15ns PALs.

The main oscillator was a 39.3216&nbsp;MHz crystal oscillator.

===ND-110/CX===
This is the fast version of the [[ND-110 CPU]], also known as '''RASK'''.

===ND-110PCX===
This is the CPU used in the [[BUTTERFLY 110]] PC-based workstation. The CPU is implemented on two full length ISA cards and based on the same design as ND-110/CX. 

===ND-120/CX===
The ND-120 CPU was a complete reimplementation on an LSI chip (The so-called [[Delilah]] chip), and was originally intended to be sold as the ''ND-1000'', to reflect the technology change, which paralleled the change from the [[ND-500]] series to the [[ND-5000 family|ND-5000]] (Codenamed [[Samson]]).

The Samson/Delilah naming scheme may reflect that around the time of the development of the ND-120, it was increasingly clear that the mixed 16/32-bit architecture was a bottleneck for the ND-500(0) architecture; Internal technical documentation used at Norsk Data for the Delilah chip has a drawing of a grinning woman with hair in her clenched fist.

===ND-125/CX===
The ND-125 CPU appears to be based on an ND-120 CPU, but with improved performance by speeding up memory access to the on-board memory, and by increasing the on-board memory size to 8, 12, or 16 megabytes (the ND-120/CX could have a maximum of 6MB on-board). The larger memory size is achieved by using 4-Mbyte SIMMs instead of 1-Mbyte SIPs. Memory cycle time is reduced to 150 ns by using 70 ns memory modules instead of 100 ns modules.<ref>[http://sintran.com/sintran/library/libeco/ECO-ND-100-786.pdf sintran.com, ECO 100-786, date: 1994.09.09]</ref>

==Surviving systems==
There are quite a lot of surviving ND-100 systems remaining. This list is far from complete.
* ND-100 serial 383 : In the collections of Telemuseet<ref>[http://digitaltmuseum.no/021026130703 Collections of Telemuseet, TELE.Hf-226]</ref>

==Gallery==
<gallery>
Image:ND-100 CPU RACK-001.jpg|ND-100 rack with a lot of serial ports but missing CPU
Image:ND100-CPU-board.jpg | [[3002]] ND-100 CPU board.
Image:ND-100-FrontPanel.jpg|[[ND-100 front panel]]
Image:ND-100_Satellite.jpg | [[ND-100 Satellite]]
</gallery>

== See also ==
*[[Wikipedia:NORD-100]]

== References ==
<references/>
*{{OriginWP-EN|NORD-100|4th August 2008}}
*{{ND-doc|06.014.02}}