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Description Subtract from floating accumulator
Format FSB <addr. mode> <disp.>
Code 104 0008
Affected T A D, TG
Type User
Architecture ND-100, ND-110

FSB is an assembly instruction. The contents of the effective address and the following one or two locations are subtracted from the floating accumulator. The result is in the floating accumulator.

On 32-bit floating point hardware only registers A and D are used, and two address locations instead of three.

Flags affected

The rounding indicator for floating point operations (TG, sometimes called just G) may be set by this instruction.