NLZ: Difference between revisions

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(refrase)
(Clarify 48-bit FP/32-bit FP)
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|Format=NLZ ''<scaling>''
|Format=NLZ ''<scaling>''
|Code=151&nbsp;400
|Code=151&nbsp;400
|Affected=(T), (A) and (D)
|Affected=(T), (A), (D)
|Arcitecture=[[ND-100]], [[ND-110 CPU|ND-110]]
|Arcitecture=[[ND-100]], [[ND-110 CPU|ND-110]]
}}
}}


'''NLZ''' is an assembly instruction. It converts the number in the [[A register]] to a standard form floating number in the [[floating point accumulator]] (A and D registers), using the ''scaling'' of the NLZ instruction as a scaling factor.  
'''NLZ''' is an assembly instruction. It converts the number in the [[A register]] to a standard form [[48-bit floating point]] number in the [[floating point accumulator]] (T, A and D registers), using the ''scaling'' of the NLZ instruction as a scaling factor.  


The ''scaling'' is given to the conversion of -128 to 127 (approximately 10<sup>-39</sup> to 10<sup>39</sup>).
The ''scaling'' is given to the conversion of -128 to 127 (approximately 10<sup>-39</sup> to 10<sup>39</sup>).
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== ND-110 48-bit floating point CPU ==
== ND-100 32-bit floating point CPU ==
{{main|48-bit floating point}}
{{main|32-bit floating point}}
 
The ND-110 can have a 48-bit floating point CPU. In the 48-bit floating point CPU a further register (T) and memory location ([[ea]] + 2) are used. In this case, the [[T register]] is linked to location ea, A to ea + 1 and D to ea + 2.


The ND-100/110 can have a 48-bit floating point CPU (standard configuration) or a 32-bit floting point CPU (customer option).
For 32-bit floating point operations NLZ works as described above, except that the T register is not affected.


== References ==
== References ==
*{{ND-doc|06.014.02|page 144 and 240}}
*{{ND-doc|06.014.02|pages 120, 144, 146 and 240}}
*{{ND-doc|06.029.01|page 70 and 72}}
*{{ND-doc|06.029.01|page 70 and 72}}


[[Category:ND-100 instructions]]
[[Category:ND-100 instructions]]

Revision as of 10:29, 29 July 2009

NLZ
Description Normalize (integer to floating)
Format NLZ <scaling>
Code 151 4008
Affected (T), (A), (D)
Type User
Architecture {{{Architecture}}}

NLZ is an assembly instruction. It converts the number in the A register to a standard form 48-bit floating point number in the floating point accumulator (T, A and D registers), using the scaling of the NLZ instruction as a scaling factor.

The scaling is given to the conversion of -128 to 127 (approximately 10-39 to 1039).

For integers, a scaling factor of +1610 will give a floating point number with the same value as the integer. A larger scaling factor will result in a higher floating point number. Because of the single precision fixed point number, the D register will be cleared.


Example

  • NLZ+20 (code 151420) Convert from integer to floating point.


ND-100 32-bit floating point CPU

Main article: 32-bit floating point

The ND-100/110 can have a 48-bit floating point CPU (standard configuration) or a 32-bit floting point CPU (customer option). For 32-bit floating point operations NLZ works as described above, except that the T register is not affected.

References