User talk:RHansen
Hi fellow emulator writer! My own emulator is more similar to Carl-Victor's, I emulate SINTRAN but can't boot it.
As for the K version it doesn't need a 110 CPU, but if it's /VSX it needs a 100/CX, i.e. the extra CX instructions must be there. K came in both VSE (no CX needed) and VSX (CX needed). From version L and later only CX versions would work - I think even version M would run on a plain 100/CX.
As for the disk for M, as with all SINTRAN images they were generated for a specific configuration, and the version I have, at least, was generated for a setup with SCSI disks only. TArntsen (talk) 08:53, 5 October 2022 (UTC)
(EDIT: I checked my M version and it does seem to have the disk type choices (in addition to SCSI) shown in that disk-choice picture) TArntsen (talk) 11:45, 5 October 2022 (UTC)
Hello, it's great to have other emulator writers to discuss with and learn from! In regards to the CX instructions, if I am not wrong its these: ADDD,SUBD,COMD, PACK, UPACK, SHDE. Those I have not yet finished implemented, but I have enforced a breakpoint in the code if they get called - and so far they havent.
It might be the fact that I havent been able to get very far in the boot sequence of SIII K or M. They will be implemented ASAP I have some code calling them, right now I am focusing on getting boot to work.
The M disk's I have is actually disks I have found here [1]. Its SINTRAN M Std C. I dont know what the requirements are, as I dont have access to the "SINTRAN III M-version Release Information", the closest I have is "ND-860230-6-EN Sintran III - Release Information - L-Version" - which does mention type A and B, but nothing about C. When booting, I do have a choice of disks, ref this screenshot [2]. I have now started the implementation of the SCSI driver to see if it will solve the boot error, but I would think that it should be able to boot from SMD disks as they are valid choides... Where can I find a copy of the SINTRAN M you are using ? RHansen (talk) 13:58, 5 October 2022 (UTC)
![[2]](https://www.ndwiki.org/wiki/File:Disk-choice-m.png){kind=link}
- The instructions you listed are the decimal instructions from the CE set, there are also stack handling instructions, and the CX instructions are those plus some more (see ND-1xx_Instructions. But in addition to that you'll need to implement a dummy GECO instruction because SINTRAN uses that to detect if the CE (in practice it's the CX) instruction set is present.. if not, it won't even bother. As for SINTRAN M, Tingo's floppy set which you are using seems to be version 250306M06, what I have is 250305M05, which would be slightly older. I can't recall if I uploaded those somewhere, or if Tingo got a copy, but if you want them I can upload them somewhere. The M release info should be here: [3] TArntsen (talk) 13:13, 5 October 2022 (UTC)
- Thanks, I have downloaded the documentation - and it seems that SIII M supports ND-100 and SMD DISK. It states:
ND-100 CPU, one of ND-100/CX with 32/48 FPP and Memory Management II If SMD disk controller (10MHZ) is to be used, the following applies: SMD Control (print 3018). ECO Level R is required SMD Data (print 3019). ECO level BE is required.
- I have implemented Memory Management II, and a buggy 32 bit FPP (which I need to improve). I also need to work on the missing CX instructions, but so far they havent been called - maybe except MOVEW which I have implemented. GECO/GECOX is there after I found it in the 110 microcode - It does nothing, except being callable.
- And the SMD disk controller should work - i need to identify what the specifics with ECO level means. I definitively will spend more time making sure the implementation is passing TPE-MON validation with DISC-TEMA.
- I would love to have a copy of your SIII M disks. And if you have other boot floppies for J or L or K that is not uploaded somwehere else, i would be happy to test a bit with those. RHansen (talk)
SINTRAN III and hardware configuration
As far as I know, each set of install floppies was created for a specific customer machine in the early days. This didn't change until whatever version of SINTRAN III that included the CONFIGURATION-S3 program came. If this hardware configuration also included locking it down to only the serial number of the machine in question, I do not know.
Oh - congrats on the nice progress with your emulator! Torfinn (talk) 01:40, 6 October 2022 (UTC)
Micro-code not loaded
Just did a quick dig at this. If this were Sintran L then it would mean that the micro code level reported by your CPU is too low. The code executed looks like this:
171500 SAX 100 150017 TRA CS 004115 STA * 115 146151 COPY SA DD 171013 SAT 13 143465 SKP IF DA MLST ST 124006 JMP * 6 174000 BSET ZRO SSPTM 044076 LDA * 76 135073 JPL I * 73 174200 BSET ONE SSPTM 125074 JMP I * 74
which is (pseudo-code):
set X = 0100 read control store copy A to variable (A=micro code version. hold it somewhere where other code can get it) copy A to D if A < 13 set 1bank call output with string "Micro-code not loaded. CPU revision too low" (that 'LDA *76' loads a pointer to the string) set 2bank bail out endif
However, I haven't been able to find the same code or something similar in Sintran M yet, even though I can find the same string. TArntsen (talk) 09:02, 7 October 2022 (UTC)
SINTRAN M
035500 171500 SAX 100 035501 150017 TRA CS 035502 004115 STA *115 035503 146151 COPY SA DD 035504 171013 SAT 13 035505 143465 SKP IF DA MLST ST 035506 124006 JMP *6 => [EA:035514] 035507 174000 BSET ZRO SSPTM 035510 044076 LDA *76 035511 135073 JPL I *73 035512 174200 BSET ONE SSPTM 035513 125074 JMP I *74
Tried with returning 14d/16oct, ended up in Opcom with no message
034100 151000 WAIT 0
- RHansen (talk) 12:46, 7 October 2022 (UTC)
- There's a test after that which may bail out without any message, but I would have to trace that to see exactly what's supposed to happen and my emulator isn't up to that. Can you single-step your emulator at that point? There's approx. 50 instructions to trace (after the above) TArntsen (talk) 14:08, 7 October 2022 (UTC)
Thanks for helping !
I have a debugger that supports breakpoint on memory execution, read and write. I can single step, and I can trace :)
Here is the 50 instructions from the breakpoint at 035500, I will try to add some more meaning to it with traced values
* 035500 171500 SAX 100 035501 150017 TRA CS A=000025 (this is whatever value I return from the Control Store, I test with 25) 035502 004115 STA *115 [EA:035617 ] 035503 146151 COPY SA DD D = A 035504 171013 SAT 13 T = 000013 035505 143465 SKP IF DA MLST ST => NO-SKIP
035506 124006 JMP *6 [EA:035514 ] 035507 174000 BSET ZRO SSPTM -- not executed-- 035510 044076 LDA *76 -- not executed-- 035511 135073 JPL I *73 -- not executed-- 035512 174200 BSET ONE SSPTM -- not executed-- 035513 125074 JMP I *74 JMP TO [35607] (ERRFATAL ?)
035514 050077 LDT *77 [EA:035613 ] T = 000007 035515 054077 LDX *77 [EA:035614 ] X = 000000 035516 173401 AAX 1 X = X + 1, X=1 035517 143300 LDATX 0 A = 002000 035520 004103 STA *103 [EA:035621 ] 035521 060073 ADD *73 [EA:035614 ] A= A + 0, A = 003100 035522 004074 STA *74 [EA:035616 ] 035523 173401 AAX 1 X = X + 1, X=2 035524 143300 LDATX 0 A= 060000 035525 060071 ADD *71 [EA:035616 ] A = A + 002000, A = 062000 035526 004073 STA *73 [EA:035621 ] 035527 173401 AAX 1 X = X + 1, X=3 035530 143300 LDATX 0 A=003100 035531 154402 SHA 2 A=014400 035532 060064 ADD *64 [EA:035616 ] A = A + 002000, A=016400 035533 004067 STA *67 [EA:035622 ] 035534 173401 AAX 1 X = X + 1, X=4 035535 143300 LDATX 0 A = 072000 035536 060060 ADD *60 [EA:035616 ] A = A + 002000, A=074000 035537 064064 SUB *64 [EA:035623 ] A = A -(), A=072000 035540 146154 COPY SA DL L=072000 035541 064061 SUB *61 [EA:035622 ] A = A-(), A=053400 035542 004061 STA *61 [EA:035623 ] 035543 173401 AAX 1 X = X + 1, X=5 035544 143300 LDATX 0 A=002400 035545 146045 RADD SL DA A:074400 035546 004056 STA *56 [EA:035624 ] 035547 173773 AAX -5 X = X -5, X=0 035550 054046 LDX *46 [EA:035616 ] X=002000 035551 173500 AAX 100 X=02100 035552 143300 LDATX 0 A=000014 035553 004045 STA *45 [EA:035620 ] 035554 142015 SKP IF DA UEQ SD SKIP IF A (000014) != D(000025) (D is my value from Control Store address 000100. I dont know what sets A to 000014 035555 124021 JMP *21 [EA:035576 ] -- skipped -- 035556 174000 BSET ZRO SSPTM 035557 175375 BSKP ONE 170 DA -- not skipped -- A bit 15 is not 1 (A= 000014) 035560 124006 JMP *6 [EA:35566 ] 035561 175171 BSKP ZRO 170 DD -- not skipped -- D bit 15 is not 1 (D=000025) 035562 124004 JMP *4 [EA:35566 ] 035563 044025 LDA *25 [EA:35610] A=035300 035564 135020 JPL I *20 035565 135024 JPL I *24 035566 175175 BSKP ZRO 170 DA 035567 124006 JMP *6 035570 175371 BSKP ONE 170 DD 035571 124004 JMP *4 035572 044016 LDA *16 035573 135011 JPL I *11 035573 135011 JPL I *11 035574 135015 JPL I *15 035575 174200 BSET ONE SSPTM 035576 141415 SKP IF DA MGRE SD 035577 124147 JMP *147
035600 124025 JMP *25 <== I would like to know what I need to land here without "manually" patching the boot.
Boot continue if I jump to 035600, now it crashed with "Error in CPU control store RAM. Address : 000000". Implementing R/W for control store.
After implementing R/W for control store, i see SIII checks for RAM errors by first writing 24576 entries, then reading to verify Then the normal scan for devices over "all" IOX addresses up to 177777. Then the now familiar "ReturnToZeroSeek" on the SMD HDD which I have learned to love, as its now SIII really starts. A around ~60 PT entries are flagged as used, CCL is set to 040000 (not really sure what this does) PT 0 and PT 15 is re-configured, then PCR on Level 0 is set to 051606 (Ring = 2, Sixteen PageTableMode, PIL =0, APT = 0007, PT = 0012) 15 more page tables flagged as used.
Then it ends up with a WAIT 0 at 034100 (PIL=13,PVL=0, IONI=off) - This is inside RTC handler, dont know why IONO is off which makes the WAIT end up in OpCom > 034100 151000 WAIT 0 [A:071766 D:000001 T:057105 L:071766 X:110265 B:046744 ]
Last lines at level 0 before enabling IONI may give a hint of what is going on.. or maybe not.. I really need som SIII source code to validate against.
__PC__ __PIL_ __STST__ |MMU|INT| __EA__ | __PC__ OPCODE | ASSEMBLY 034264 0 PtkzqOcm |OFF|OFF| | 034264 171400 SAX 0 [A:000000 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034265 0 PtkzqOcm |OFF|OFF| 031777 | 034265 047017 LDA ,X I *17 [EA:031777 ][A:000000 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034266 0 PtkzqOcm |OFF|OFF| | 034266 150103 TRR PCR [A:051606 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034267 0 PtkzqOcm |OFF|OFF| 034306 | 034267 124017 JMP *17 [EA:034306 ][A:051606 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034306 0 PtkzqOcm |OFF|OFF| 034330 | 034306 044022 LDA *22 [EA:034330 ][A:051606 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034307 0 PtkzqOcm |OFF|OFF| | 034307 146157 COPY SA DX [A:004471 D:000000 T:174200 L:034233 X:000000 B:170400 ] 034310 0 PtkzqOcm |OFF|OFF| | 034310 171001 SAT 1 [A:004471 D:000000 T:174200 L:034233 X:004471 B:170400 ] 034311 0 PtkzqOcm |OFF|OFF| | 034311 143300 LDATX 0 [A:004471 D:000000 T:000001 L:034233 X:004471 B:170400 ] 034312 0 PtkzqOcm |OFF|OFF| | 034312 131015 JAZ 15 [A:000000 D:000000 T:000001 L:034233 X:004471 B:170400 ] 034327 0 PtkzqOcm |OFF|OFF| 012176 | 034327 125004 JMP I *4 [EA:012176 ][A:000000 D:000000 T:000001 L:034233 X:004471 B:170400 ] 012176 0 PtkzqOcm |OFF|OFF| | 012176 150412 PION [A:000000 D:000000 T:000001 L:034233 X:004471 B:170400 ] 034101 13 Ptkzqocm |ONx|ON | | 034101 146155 COPY SA DA [A:000000 D:000000 T:000000 L:000000 X:000000 B:000000 ]
ND-110 access - with caveats
My ND-110 (9883.21005) is available for running test programs. Caveats:
- I have not been able to boot SINTRAN from the hard drive (it installs, but doesn't boot)
- any test program needs to be supplied as a BPUN file that I can put on a floppy (or as a floppy image that I can just write to a floppy)
- the machine might not work properly (wrong revision / eco of some cards, wrong configuration, other hw issues)
if this sounds workable, please get in touch. Torfinn (talk) 20:43, 11 October 2022 (UTC)
- Thank you for this offer, I might take you up on this. I am especially interrested in getting the content of the control-store - and the values fromt the VERSN instruction out.
- I just first need to be able to write some code that can get this out and dump it to the console - assuming you use an terminal so you could capture the output.
- If you have a copy of a ROM that is the Control Store/MicroInstructions for ANY ND machine I would very happy if I could have a copy.
- Ronny (talk) 02:05, 23 October 2022 (UTC)