|Description||Add to A register|
|Format||ADD <addr. mode> <disp.>|
|Affected||A:=A+(ea), C, O, Q|
The carry indicator (C) is set to 1 if a carry occurs from the sign bit positions of the adder, otherwise the carry indicator is reset to 0. If the signs of the two operands are equal, but the sign of the result is different, overflow has occurred, and both the dynamic overflow indicator (Q) and the static overflow indicator (O) are set to one. If the condition for overflow does not exist, the dynamic overflow indicator is reset to 0, while the static overflow indicator is left unchanged.